2E3AA4 | HDL Language | Electronics and Applied Physics | S7 | ||||||
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Lessons : 5 h | TD : 0 h | TP : 15 h | Project : 0 h | Total : 20 h | |||||
Co-ordinator : Ahmed Aouchar |
Prerequisite | |
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Logic | |
Course Objectives | |
Introduce the latest generation of FPGA (Field Programmable Gate Array). Master features and know how to take the best advantage. Learn an HDL language (Hardware Description Language) and apply it effectively to the logic synthesis. |
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Syllabus | |
Hardware : 1. Programmable components: technology, classification, features, programming, logic synthesis and applications. 2. Detailed structures of latest Xilinx FPGA (Spartan, Artix, Kintex and Virtex families). Resources, performance and applications. Software : 1. VHDL (VHSIC Hardware Description Language) concepts. 2. VHDL for logic synthesis: how to use VHDL to describe hardware systems for synthesis, how to optimize the code for an effective compilation. |
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Practical work (TD or TP) | |
Using Xilinx FPGA for implementing digital systems described in VHDL language. Pre and post routing simulation and timing performances. - Counter and display - UART (Universal Asynchronous Receiver Transmitter ) - Automatic frequency measurement - I2C temperature sensor |
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Acquired skills | |
Writing and optimized code in VHDL language. Choosing the most suitable component for any application to take the most advantage. |
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Bibliography | |
VHDL (DOUGLAS PERRY) McGraw-Hill Verilog HDL Synthsis (J. Bhasker) Galaxy Publishing IEEE Standard VHDL (IEEE) |
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